Modern processors can deliver high throughput through SIMD execution, motivating auto-vectorization techniques that extract data level parallelism from scalar code by identifying independent, isomorphic computations and legally reordering them for vector execution. Existing compiler vectorizers, primarily based on Superword Level Parallelism (SLP) and Loop Level Parallelism (LLP), are effective in many scenarios but share a fundamental limitation: their vectorization logic is algorithm-centric, with decisions tightly coupled to specific vectorization algorithms. This design makes it difficult to extend support to emerging forms of parallelism without redesigning or introducing new vectorization algorithms.

In this work, we argue that vectorization should instead be dependence-centric, driven by the program’s dependence structure rather than hard-coded vectorization patterns, and that extensibility should be treated as a first-class design goal. We introduce a dependence-centric, extensible vectorization framework built on VIR, an intermediate representation inspired by Predicated SSA (PSSA) that unifies data and control dependences. By decoupling vectorization opportunities from specific algorithms, our framework enables the systematic integration of new vectorization strategies beyond prior approaches.

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